GENERAL CHAIR
DR. HAROLD (HARRY) HOVEL received his BS and PhD degrees in 1964, ’65 and ’68 respectively, in electrical engineering from Carnegie-Mellon University. He joined IBM at the Watson Research Laboratory in Yorktown Heights in 1968 and began working on GaAs lasers and various hetero-junction devices. He co-developed GaAs high efficiency solar cells in 1970 and worked on solar energy problems until 1981; he authored a solar cell textbook and many review papers during that time. After 1982, he worked in GaAs integrated circuits, specializing in implantation, annealing, and materials characterization. He was part of a team that developed 1 GHz optelectronic integrated circuits. After 1992, he started working on SOI technology, particularly materials characterization and starting material qualification for integrated circuit runs. He has received numerous patent awards and was the Eta Kappa Nu “Outstanding Young Engineer in the United States” award recipient in 1973. He has served on the SOI Conference Committee since 1994. He is presently the chairman of the Physics Committee in the National Research Council’s Associateship Program.

TECHNICAL PROGRAM CHAIR
DR. DIMITRIS E. IOANNOU received his BSc (1974) degree in physics from the University of Thessaloniki, Greece and his MS (1975) and PhD (1978) degrees in solid-state electronics from the University of Manchester Institute of Science and Technology (UMIST), Manchester, England. He held positions with the Democritus University of Thace (Greece) and the University of Maryland (College Park) prior to his current position of profes-sor of electrical and computer engineering at George Mason University (Fairfax, VA). His main contributions include the development of SEM-EBIC techniques, SiC Schottky and Ohmic contact technology, and with regard to SOI technology, he developed techniques for the study of deep traps, carrier generation lifetime, and interface states. He also did research on device physics and hot carrier reliability of SOI devices. His research interests remain in devices and materials for VLSI. 

LOCAL ARRANGEMENTS CHAIR
DR. MICHAEL S. T. LIU received his PhD in electrical engineering from the University of Minnesota in 1967. He has been with Honeywell since 1968 and is currently a chief engineering fellow. He has contributed many techniques to harden the buried oxide of SOI substrates to meet ASIC and SRAM operation in extreme harsh radiation environment. He has been granted 18 U.S. patents and one Canadian patent. He was active in the IEEE Ferroelectric Committee in 1970 and 1980, and served as the general chairman of the 4th IEEE International Symposium on Applications of Ferroelectrics in 1979. He has authored or co-authored three chapters on pyroelectric coefficients, and more than 100 papers published in technical journals and conference proceedings in the areas of noise, ferroelectrics and pyroelectric detectors, selective epitaxy, and SOI materials and devices. His areas of current interest are SOI materials, deep submicron SOI CMOS devices and technology, and radiation hardening of SOI CMOS devices. 

TREASURER & REGISTRATION CHAIR
MIKE MENDICINO received his BS degree from Ohio State University in 1989, and his MS and PhD degrees in chemical engineering from the University of Illinois in 1994. He completed a two-year assignment at SEMATECH where he was a project leader responsible for thin film SOI materials characterization and development. He is currently with Motorola’s Digital DNA Laboratories working on advanced device technologies for high performance CMOS applications. Mike is a member of the technical staff at Motorola and member of IEEE. 

RUMP AND POSTER CHAIR
DR. JOHN CONLEY received the BS degree in electrical engineering in 1991 and PhD in engineering science and mechanics in 1995 from Pennsylvania State University; he won a 1996 Xerox Prize for his dissertation. Dr. Conley has authored or co-authored over 40 technical papers and over 50 conference presentations. He also serves or has served on the technical committees of the IEEE Nuclear and Space Radiation Effects Conference, the IEEE Reliability Physics Symposium, and the IEEE Integrated Reliability Workshop. He joined Dynamics Research Corporation in 1995 and worked on modeling the physics of MOS device reliability and radiation susceptibility for predictive TCAD tools. Dr. Conley is currently with NASA's Jet Propulsion Lab-oratory where his research interests include SOI materials and devices, reliability and radiation hardness, and microelectronics materials and technology for space applications. 

SHORT COURSE CHAIR
DR. JAMES BURNS received the B.S. degree in physics from the Carnegie Institute of Technology in 1960 and the Ph.D. degree in physics from the University of Vermont in 1975. He worked in semiconductor and magnetic film device design and processing at IBM and CCD design while at Honeywell.  Since 1975 has been a staff member at MIT's Lincoln Laboratory where his principal interests are silicon transistor and process design and the development of analytical techniques to customize IC fabrication to integrated circuit applications. He developed the laboratory's  deep sub-micron fully depleted SOI process and is currently working on integrating that SOI technology into a three-dimensional integrated circuit technology. He is a member of the American Physical Society, IEEE, and Tau Beta Pi.
 

PUBLICITY CHAIR
DR. CHRISTOPHE TRETZ received his BSc degree (1991) from the Ecole Nationale Superieure d'Electronique, Electrotechnique, Informatique et Hydraulique de Toulouse (ENSEEIHT), France, and his MS (1992) and PhD in Electrical Engineering (1997) from Columbia University, New York. He joined IBM at the TJ Watson Research Center in Yorktown Heights, NY in 1997 and contributed to the design of several microprocessors for servers and workstations both with bulk and SOI processes. In 2000, he joined Advanced Micro Devices, in the California Microprocessor Division, as a member of the technical staff, and he is contributing to the design of the Hammer microprocessor family, and is establishing design guidelines for microprocessor using SOI technologies. Dr. Tretz has authored or coauthored about 20 papers and 3 US patents in the field of circuit design techniques using SOI, circuit optimization and low power design. His current research interests remain in optimizing circuit design for SOI and in improving design choices for SOI.