2010 IEEE International SOI Conference  
11 - 14 October, 2010  

Catamaran Resort & Spa, San Diego, California

Ever increasing demand and advances in SOI and related technologies make it essential to meet and discuss new gains and accomplishments in the field.  For 35 years the IEEE International SOI Conference has been the  premier meeting of engineers and scientists dedicated to current trends in Silicon-on-Insulator technology.  Sponsored by the IEEE Electron Devices Society, the conference traditionally provides a forum for open discussion in all areas of SOI technologies and applications as well as the introduction of new developments presented in original papers presented at the technical sessions. 

SUBMISSION DEADLINE EXTENDED to
6-JUNE-2010

AREAS OF FOCUS

  • DEVICE PHYSICS and MODELING
  • SUBSTRATE ENGINEERING (III-V advanced substrates, hybrid Si and III-V integration)
  • NEW DEVICE / PHYSICS USING ADVANCED SUBSTRATES (III-V CMOS, hybrid SI and III-V)
  • MANUFACTURABILITY and PROCESS INTEGRATION of SOI DEVICES
  • LOW-POWER SOI TECHNOLOGY and CIRCUIT DESIGN INFRASTRUCTURE
  • SOI CIRCUIT APPLICATIONS (high-performance Mpu, SRAM, ASIC, high-voltage, RF, analog, mixed mode, etc.)
  • SOI DOUBLE and MULTIPLE GATE/VERTICAL CHANNEL STRUCTURES; OTHER NOVEL SOI STRUCTURESNEW SOI STRUCTURES, CIRCUITS, and APPLICATIONS (displays, microactuators, novel memories, optics, etc.)
  • SOI RELIABILIITY ISSUES (hot-carrier effects, radiation effects, high-temperature effects, etc.)
  • MATERIAL SCIENCE / MODIFICATION, SOI CHARACTERIZATION, MANUFACTURE
  • SOI SENSORs, MEMs, and RFIDs TECHNOLOGY and APPLICATIONS
  • 3D integration (imagers, power devices, wafer-to-wafer and die to wafer 3D integration)
  • SILICON or SOI PHOTONICS